Affiliations
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Georgia Institute of Technology (August 2023 - Present)
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Qualcomm - Associate Engineer (July 2022 - August 2023)
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Indian Institute of Technology Bombay (July 2018 - June 2022)
About
The thermal throttling of my new phone while gaming piqued my interest in the CPU’s microarchitecture. It became my passion and set me on my curiosity-led research journey. I have completed my undergraduate studies (B.Tech.) at IIT Bombay (IITB) in Electrical Engineering with Honours and with Minor in Computer Science and Engineering. I have been exposed to research at IITB, Nanyang Technological University (NTU) Singapore, and now at Qualcomm- a combination of national and international institutes along with the industry.
I secured the research internship at NTU, in the third-semester winter break under the guidance of Prof. YT Lee. I worked on a problem reconstructing the 3D model of a room from its 2D photograph. I independently developed a novel solution for locating the room corners instead of wall edges. Based on this performance, I was again selected for the semester-long research internship in my fifth semester at NTU’s Future Mobility Solutions Lab under the guidance of Dr Anshuman Tripathi. I selected the deep learning model for object detection based on the performance of R-CNN, YOLO (v1 to v4), and SSD. Patent maps were developed for technology insights. My work is reported in the journal paper, which is accepted for publication. It is exciting that my contributions are incorporated into the AV prototype for field testing in Singapore. It gave me the confidence that I can think independently, apply concepts and come up with a novel solution.
In my final year, I pursued a year-long research project in computer architecture under the guidance of Prof. Virendra Singh. The use of equally-sized static queues in slice-out-of-order cores affects energy efficiency. To overcome this, the solution proposed included the use of optimally sized dynamic multi-purpose queues which leads to an 11% improvement in energy efficiency (MIPS/W). I gained insights into ways of thinking creatively and architecting a problem-solving methodology to solve the problem.
I secured the Advanced Performer (AP) in the Processor Design and Engineering Graphics courses. I have secured a 10/10 SPI in my second and eighth semesters. I have filed two Indian Patent Applications in the image processing domain. I volunteered to assist Prof. Vikram Gadre, as a Teaching Associate in developing NPTEL MOOC on Digital Signal Processing. This experience helped me understand the perspective of a teacher.
I am now pursuing my MS in ECE at Georgia Tech.